The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2010

Filed:

Jul. 01, 2008
Applicants:

Daniel M. Dreps, Georgetown, TX (US);

David J. Chen, Endwell, NY (US);

William F. Lawson, Vestal, NY (US);

David W. Mann, Endwell, NY (US);

Inventors:

Daniel M. Dreps, Georgetown, TX (US);

David J. Chen, Endwell, NY (US);

William F. Lawson, Vestal, NY (US);

David W. Mann, Endwell, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory interface device, system, method, and design structure for controlling for variable impedance and voltage in a memory system are provided. The memory interface device includes a calibration cell configurable to adjust an output impedance relative to an external reference resistor, and driver circuitry including multiple positive drive circuits and multiple negative drive circuits coupled to a driver output in a memory system. The memory interface device further includes impedance control logic to adjust the output impedance of the calibration cell and selectively enable the positive and negative drive circuits as a function of a drive voltage and a target impedance.


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