The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2010
Filed:
Mar. 14, 2006
Johnny Chan, Fremont, CA (US);
Philip S. NG, Cupertino, CA (US);
James Hughes, Colorado Springs, CO (US);
Johnny Chan, Fremont, CA (US);
Philip S. Ng, Cupertino, CA (US);
James Hughes, Colorado Springs, CO (US);
Atmel Corporation, San Jose, CA (US);
Abstract
A method of testing power-on reset circuitry in an integrated circuit comprises establishing the a first state of the integrated circuit that is different from a normal reset state of the circuit, lowering the VCC power supply voltage from a normal high operating level Vto a specified lower level Vthen raising it back to the normal high level, then determining whether or not the integrated circuit has assumed the reset state. The testing can repeated with a plurality of lower VCC levels Vand under a variety of operating conditions to characterize resetting parameters and to designate pass/fail results for individual chips. If an AC voltage detector is part of the power-on reset circuitry, then it can tested separately, and DC testing occurs with very slow ramp rates for lowering and raising the power supply voltage.