The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2010

Filed:

May. 23, 2007
Applicants:

Tamae Takano, Atsugi, JP;

Atsushi Tokuda, Isehera, JP;

Ryota Tajima, Atsugi, JP;

Shunpei Yamazaki, Setagaya, JP;

Inventors:

Tamae Takano, Atsugi, JP;

Atsushi Tokuda, Isehera, JP;

Ryota Tajima, Atsugi, JP;

Shunpei Yamazaki, Setagaya, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd, Atsugi-shi, Kanagawa-ken, unknown;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
Abstract

An object is to provide a nonvolatile semiconductor memory device which is excellent in a writing property and a charge retention property. In addition, another object is to provide a nonvolatile semiconductor memory device capable of reducing writing voltage. A nonvolatile semiconductor memory device includes a semiconductor layer or a semiconductor substrate including a channel formation region between a pair of impurity regions that are formed apart from each other, and a first insulating layer, a plurality of layers formed of different nitride compounds, a second insulating layer, and a control gate that are formed in a position which is over the semiconductor layer or the semiconductor substrate and overlaps with the channel formation region.


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