The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2010
Filed:
Mar. 12, 2008
Venkatesh Deshpande, Karnataka, IN;
Aniruddha Haldar, Kolkata, IN;
Sujil Kottekkat, Kerala, IN;
LSI Corporation, Milpitas, CA (US);
Abstract
The link layer of the multi-root PCI (peripheral component interconnect) express device stores transaction layer packets (TLPs) sent from a transaction layer in a dedicated retry buffer dedicated to the virtual hierarchy (VH) associated with the TLP. The link layer of the multi-root device also stores information related to the TLP about the VH and an address of the TLP stored in the dedicated retry buffer in a sequence buffer. Upon receipt of a reset request for a VH, the link layer may purge the dedicated retry buffer associated with the VH. After purging, the multi-root device may send an ACK (acknowledge code) DLLP (data link layer packet), indicating that the VH has been successfully reset. By utilizing multiple retry buffers, the ACK DLLP response for a VH reset is sent as soon as the retry buffer pointers are reset to initial values.