The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2010

Filed:

Feb. 28, 2007
Applicant:

Hiroyuki Sugiyama, Kawasaki, JP;

Inventor:

Hiroyuki Sugiyama, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 23/00 (2006.01); G06F 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Using data obtained by varying intra-chip variance, a frequency distribution of a yield corresponding to each intra-chip variance is obtained by a statistical timing analysis. The frequency of a ring oscillator loaded into the chip of an LSI is measured for each chip, and the frequency distribution of the ring oscillator is obtained. The convolution between the frequency distribution of a yield corresponding to each intra-chip variance and the frequency distribution of the ring oscillator is performed. By integrating the results the cumulative probability distribution of the yield of the LSI corresponding to each intra-chip variance is obtained. The fit is rendered between the distribution and the yield distribution of the LSI chip of the past lot, an appropriate intra-chip variance value is obtained, the cumulative probability distribution corresponding to the value is similarly calculated, and the result is defined as an estimated distribution of the yield of the LSI chip.


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