The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2010
Filed:
May. 13, 2008
Yuuichi Takenaka, Chiba, JP;
Kikuo Ono, Mobara, JP;
Yuuichi Takenaka, Chiba, JP;
Kikuo Ono, Mobara, JP;
Hitachi Displays, Ltd., Chiba, JP;
Abstract
A liquid-crystal display device is provided which is improved in image quality by supplying a reference voltage signal to a liquid-crystal display panel through a multiplicity of distributed supply paths. The liquid-crystal display device includes a liquid-crystal display panel and a semiconductor device connected to a part of a periphery of the liquid-crystal display panel. The liquid-crystal display panel has a plurality of signal lines for supplying various signals to address pixels, on one of a pair of substrates arranged oppositely through a liquid crystal. The signal lines include a common bus line for supplying a reference voltage signal. The semiconductor device is structured with a semiconductor chip mounted on a flexible board. The flexible board at least has a line leading to a terminal for supplying a signal to the signal line of the liquid-crystal display panel through the semiconductor chip. The reference voltage signal is to be supplied to the common bus line of the liquid-crystal display panel through at least a common line formed on the flexible board of the semiconductor device. The common line on the flexible board is formed in an area outside a mount area of the semiconductor chip and in an area passing through the mount area of the semiconductor chip.