Stacked semiconductor package that prevents damage to semiconductor chip when wire-bonding and method for manufacturing the same

Abstract

A stacked semiconductor package includes a substrate having first and second contact pads. A first stacked package group is disposed on the substrate, and the first stacked package group includes first semiconductor chips stacked in a stair form to expose first edge bonding pads. First conductive wires are used to electrically couple the first edge bonding pads and the first contact pads. An adhesive member is disposed on the uppermost first semiconductor chip, and a second stacked package group is disposed on the adhesive member. The second stacked package group includes second semiconductor chips that are stacked in a stair form to expose second edge bonding pads. When the second stacked package group is disposed on the adhesive member, the bottommost second semiconductor chips is aligned with the uppermost first semiconductor chip. Second conductive wires are used to electrically couple the second edge bonding pads and the second contact pads.