The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2010
Filed:
Oct. 27, 2006
Kikuko Sugimae, Yokohama, JP;
Masayuki Ichige, Yokohama, JP;
Fumitaka Arai, Yokohama, JP;
Yasuhiko Matsunaga, Yokohama, JP;
Atsuhiro Sato, Yokohama, JP;
Kikuko Sugimae, Yokohama, JP;
Masayuki Ichige, Yokohama, JP;
Fumitaka Arai, Yokohama, JP;
Yasuhiko Matsunaga, Yokohama, JP;
Atsuhiro Sato, Yokohama, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A nonvolatile semiconductor memory includes a memory cell transistor including a first floating gate electrode layer formed on a first tunneling insulating film, a first inter-gate insulating film, first and second control gate electrode layers, and a first metallic silicide film; a high voltage transistor including a high voltage gate electrode layer formed on the high voltage gate insulating film, a second inter-gate insulating film having an aperture, third and fourth control gate electrode layers, and a second metallic silicide film; a low voltage transistor including a second floating gate electrode layer formed on a second tunneling insulating film, a third inter-gate insulating film having an aperture, fifth and sixth control gate electrode layers, and a third metallic silicide film; and a liner insulating film directly disposed on first, second and third source and drain regions of the memory cell transistor, low voltage transistor, and high voltage transistor, respectively.