The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2010

Filed:

Nov. 01, 2004
Applicants:

Robert L. Wallace, Apex, NC (US);

Gary C. Messer, Raleigh, NC (US);

Phillip C. Jerzak, Raleigh, NC (US);

Inventors:

Robert L. Wallace, Apex, NC (US);

Gary C. Messer, Raleigh, NC (US);

Phillip C. Jerzak, Raleigh, NC (US);

Assignee:

Tekelec, Morrisville, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system are described for distributing at least one clock signal between shelves in a multi-shelf modular computing system includes a clock signal generator for generating a first clock signal, an inter-shelf bus for carrying the first clock signal to a second shelf, and a first shelf manager module, associated with the second shelf, for receiving and regenerating the first clock signal and providing the regenerated first clock signal to at least one module within the second shelf. A system and method for detecting a location of a fault in an inter-shelf bus in a multi-shelf modular computing system is also disclosed. A power source applies a bias between at least two conductors of the inter-shelf bus. At least one module detects the applied bias to determine if a fault is located between the at least one shelf and the power source.


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