Integrated circuits with configurable initialization data memory addresses

Abstract

Systems and methods are provided for avoiding memory address conflicts in systems containing shared memory. Upon system power up, programmable logic device integrated circuits, microprocessors, and other integrated circuits with processing capabilities are provided with unique initialization data memory addresses. Each unique initialization data memory address corresponds to a respective non-overlapping block of memory in the shared memory. During initialization operations, the integrated circuits retrieve initialization data from the shared memory using the unique initialization data memory addresses. The integrated circuits can be organized using a master-slave architecture. The master can load the initialization data memory addresses into the slave integrated circuits using communications circuitry that is active after the slaves have powered up but before the slaves have been initialized.