The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2010
Filed:
Dec. 01, 2004
Raghuraman Krishnamoorthi, San Diego, CA (US);
Chinnappa K. Ganapathy, San Diego, CA (US);
Raghuraman Krishnamoorthi, San Diego, CA (US);
Chinnappa K. Ganapathy, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A Fast Fourier Transform (FFT) hardware implementation and method provides efficient FFT processing while minimizing the die area needed in an Integrated Circuit (IC). The FFT hardware can implement an N point FFT, where N=ris a function of a radix (r). The hardware implementation includes a sample memory having N/r rows, each storing r samples. A twiddle factor memory can store k twiddle factors per row, where 0<k<r represents the number of complex twiddle multipliers available. An FFT module reads r rows from memory, performs an r-point complex FFT on the samples, followed by twiddle multiplication, and writes the results into an r×r register bank. The contents of the register bank are written in transposed order back to the sample memory. This operation is repeated N/rtimes for each stage and then repeated for n-stages to produce the N point FFT.