The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2010
Filed:
Dec. 15, 2006
Applicant:
Tetsuya Akimoto, Kanagawa, JP;
Inventor:
Tetsuya Akimoto, Kanagawa, JP;
Assignee:
NEC Electronics Corporation, Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04Q 1/20 (2006.01);
U.S. Cl.
CPC ...
Abstract
A timing analysis apparatus in an integrated logical circuit according to the present invention includes a jitter information generation unit for generating period jitter information of an operational clock in response to a power supply/ground noise, a jitter information storage unit for storing the generated period jitter information, and a timing analysis unit for performing a timing analysis of the integrated logical circuit based on the stored period jitter information.