Multiple level cell phase-change memory devices having controlled resistance drift parameter, memory systems employing such devices and methods of reading memory devices

Abstract

In a method of controlling resistance drift in a memory cell of a resistance-changeable material memory device, the resistance changeable material in the memory cell is treated so that a drift parameter for the memory cell is less than about 0.18, wherein a change in resistance of a memory cell over the time period is determined according to the relationship:;where Rrepresents a final resistance of the memory cell following the time period, Rrepresents the initial resistance of the memory cell following the programming operation, t represents the time period; and α represents the drift parameter.