The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2010
Filed:
Jun. 21, 2007
Applicant:
Saurabh Saxena, Jaipur, IN;
Inventor:
Saurabh Saxena, Jaipur, IN;
Assignee:
STMicroelectronics Pvt. Ltd., Greater Noida (UP), IN;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B 1/00 (2006.01); H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A CMOS Output Buffer providing controlled output impedance includes three internal sections each of which provides a impedance control for a corresponding region of the output V-I characteristics of deep linear, deep saturation and transition regions. Each internal section includes controlled current sinks/current sources enabled to provide a precise control over the DC impedance of the driver across the PAD voltage range.
Saxena, Saurabh. (2010). Controlled impedance cmos output buffer (U.S. Patent No. 7701261). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7701261
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile