The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2010
Filed:
Oct. 28, 2005
Michael D. Nelson, Mountain View, CA (US);
Michael D. Nelson, Mountain View, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Apparatus and method for outputting data from an integrated circuit having programmable logic for Single-Event Upset tolerant operation is described. Configuration memory associated with the programmable logic is read. Bits of the configuration memory read are error checked. Buffers are cycled to select one to load and another one to unload responsive to completion of each error checking cycle of the bits. For a cycle of the error checking, a first data portion is loaded into one buffer of the buffers for the cycle, it is verified whether the bits are valid for the cycle, and a second data portion is unloaded from another buffer of the buffers responsive to the bits being valid for the cycle.