The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2010
Filed:
Apr. 23, 2007
Applicants:
Ki-won Nam, Kyoungki-do, KR;
Ky-hyun Han, Kyoungki-do, KR;
Inventors:
Ki-Won Nam, Kyoungki-do, KR;
Ky-Hyun Han, Kyoungki-do, KR;
Assignee:
Hynix Semiconductor Inc., Kyoungki-Do, KR;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/76 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method for forming an isolation structure in a semiconductor device includes preparing a semi-finished substrate including a trench. An oxide layer is formed over sidewalls of the trench. A multiple layer structure of liner layers is formed over the oxide layer. An insulation layer is formed over the multiple layer structure such that the insulation layer fills an inside of the trench. The insulation layer is planarized.
Nam, Ki-Won. (2010). Method for forming isolation structure in semiconductor device (U.S. Patent No. 7700455). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7700455
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile