The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 13, 2010
Filed:
Sep. 26, 2006
Yasuhiro Agata, Osaka, JP;
Toshiaki Kawasaki, Osaka, JP;
Masanori Shirahama, Shiga, JP;
Ryuji Nishihara, Osaka, JP;
Shinichi Sumi, Hyogo, JP;
Yasue Yamamoto, Osaka, JP;
Hirohito Kikukawa, Osaka, JP;
Yasuhiro Agata, Osaka, JP;
Toshiaki Kawasaki, Osaka, JP;
Masanori Shirahama, Shiga, JP;
Ryuji Nishihara, Osaka, JP;
Shinichi Sumi, Hyogo, JP;
Yasue Yamamoto, Osaka, JP;
Hirohito Kikukawa, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A system LSI includes an input/output section and a logic circuit section. The input/output section includes an I/O power source cell having a supply voltage higher than a power source for the logic circuit section and a plurality of I/O cells in each of which an I/O power source line is provided for supplying source power from the I/O power source cell. The logic circuit section includes an I/O power consuming circuit which uses the I/O power source cell as a power source. The I/O power consuming circuit is connected to a line leading from an I/O power source line in at least one of the plurality of I/O cells.