The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2010
Filed:
Apr. 04, 2006
Stephen Hamilton, Pembroke Pines, FL (US);
Ian Andrew Swarbrick, Sunnyvale, CA (US);
Scott Carlton Evans, Santa Clara, CA (US);
Wolf-dietrich Weber, San Jose, CA (US);
Jay S. Tomlinson, San Jose, CA (US);
Stephen Hamilton, Pembroke Pines, FL (US);
Ian Andrew Swarbrick, Sunnyvale, CA (US);
Scott Carlton Evans, Santa Clara, CA (US);
Wolf-Dietrich Weber, San Jose, CA (US);
Jay S. Tomlinson, San Jose, CA (US);
Sonics, Inc., Milpitas, CA (US);
Abstract
Methods and apparatuses are described for an Intellectual Property (IP) Generator for estimating timing, area, and power characteristics of an electronic system design. The IP Generator receives a user-supplied file having data describing a configuration of an IP design having multiple levels of hierarchy. The IP Generator also receives user-supplied technology parameters and data-flow information. The IP generator correlates estimated timing, area, and power characteristics for each IP sub component based on the user supplied technology parameters, data-flow information and configuration parameters. The IP generator reports the timing, area, and power estimates to a user via a graphic user interface prior to a transformation of a Register Transfer Level (RTL) design into the gate-level circuit design.