The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2010
Filed:
Dec. 18, 2007
Darlene Hamilton, White Salmon, WA (US);
Fatima Bathul, Santa Clara, CA (US);
Ken Tanpairoj, Stanford, CA (US);
Ou LI, Fremont, CA (US);
David Rogers, Sunnyvale, CA (US);
Roger Tsao, San Jose, CA (US);
Darlene Hamilton, White Salmon, WA (US);
Fatima Bathul, Santa Clara, CA (US);
Ken Tanpairoj, Stanford, CA (US);
Ou Li, Fremont, CA (US);
David Rogers, Sunnyvale, CA (US);
Roger Tsao, San Jose, CA (US);
Spansion LLC, Sunnyvale, CA (US);
Abstract
A reduced state memory device and methods of forming and programming multi-level flash memory cell element-pairs of the device, each element configured to store a blank level or two or more program levels are provided. In one embodiment, the reduced state memory device comprises a component configured to store in the memory cell element-pairs one pattern combination of a plurality of program pattern combinations comprising two blank levels, two program levels, and one blank level and one program level, the levels differing by less than a predetermined value. In one embodiment, a method of forming a memory device comprises forming at least one memory device of a multi-level flash memory array, each memory cell comprising two or more memory elements, each memory element configured to store three or more levels, and excluding one or more program pattern combinations that can be stored in the at least one memory cell.