The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2010

Filed:

Dec. 17, 2004
Applicants:

Walter Apfelbacher, Freihung, DE;

Norbert Reichenbach, Amberg, DE;

Johann Seitz, Amberg, DE;

Inventors:

Walter Apfelbacher, Freihung, DE;

Norbert Reichenbach, Amberg, DE;

Johann Seitz, Amberg, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 29/74 (2006.01); H01L 31/111 (2006.01); H01L 29/73 (2006.01); H01L 23/52 (2006.01); H01L 23/10 (2006.01); H01L 23/12 (2006.01); H01L 23/34 (2006.01); H01L 23/48 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor switching module includes a power semiconductor element that is embodied in planar technology. In at least one embodiment, the power semiconductor element is provided with a base layer, a copper layer, and at least one power semiconductor chip that is mounted on the copper layer, and another electrically conducting layer which covers at least one load terminal of the power semiconductor chip. According to at least one embodiment of the invention, devices are provided for safely connecting the load terminal to a load circuit. The devices are configured such that a contact area thereof presses in a planar manner onto the electrically conducting layer.


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