The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2010
Filed:
Jul. 09, 2004
M. Saif Islam, Mountain View, CA (US);
Yong Chen, Sherman Oaks, CA (US);
Shih-yuan Wang, Palo Alto, CA (US);
R. Stanley Williams, Redwood City, CA (US);
M. Saif Islam, Mountain View, CA (US);
Yong Chen, Sherman Oaks, CA (US);
Shih-Yuan Wang, Palo Alto, CA (US);
R. Stanley Williams, Redwood City, CA (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
A nano-scale device and method of fabrication provide a nanowire having (111) vertical sidewalls. The nano-scale device includes a semiconductor-on-insulator substrate polished in a [110] direction, the nanowire, and an electrical contact at opposite ends of the nanowire. The method includes wet etching a semiconductor layer of the semiconductor-on-insulator substrate to form the nanowire extending between a pair of islands in the semiconductor layer. The method further includes depositing an electrically conductive material on the pair of islands to form the electrical contacts. A nano-pn diode includes the nanowire as a first nano-electrode, a pn-junction vertically stacked on the nanowire, and a second nano-electrode on a (110) horizontal planar end of the pn-junction. The nano-pn diode may be fabricated in an array of the diodes on the semiconductor-on-insulator substrate.