The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2010

Filed:

Jan. 25, 2005
Applicants:

Antonio Luis Pacheco Rotondaro, Dallas, TX (US);

Kaiping Liu, Plano, TX (US);

Jihong Chen, Plano, TX (US);

Amitabh Jain, Allen, TX (US);

Inventors:

Antonio Luis Pacheco Rotondaro, Dallas, TX (US);

Kaiping Liu, Plano, TX (US);

Jihong Chen, Plano, TX (US);

Amitabh Jain, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/337 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a method for manufacturing a transistor device, a method for manufacturing an integrated circuit, and a transistor device. The method for manufacturing the transistor device, among other steps, includes forming a gate structure over a substrate and forming source/drain regions in the substrate proximate the gate structure, the source/drain regions having a boundary that forms an electrical junction with the substrate. The method further includes forming dislocation loops in the substrate, the dislocation loops not extending outside the boundary of the source/drain regions.


Find Patent Forward Citations

Loading…