The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2010

Filed:

Apr. 21, 2005
Applicants:

Jacob Cherian, Austin, TX (US);

Nam V. Nguyen, Round Rock, TX (US);

Inventors:

Jacob Cherian, Austin, TX (US);

Nam V. Nguyen, Round Rock, TX (US);

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An architecture and method for executing write commands in a storage array is disclosed. The data strips of the data stripes of the storage array each include a parity check bit. The parity strip of each stripe includes a plurality of parity check bits, each of which is uniquely associated with one of the data strips of the stripes. The inclusion within each data stripe of parity bits associated with each data strip and the party strip provides a method for identifying a corrupted or degraded data condition that occurs as a result of a server failing fails during a write command.


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Cherian, Jacob. (2010). System and method for handling write commands to prevent corrupted parity information in a storage array (U.S. Patent No. 7689890). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7689890

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