The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2010
Filed:
Jul. 09, 2008
Tak Kwong Wong, Milpitas, CA (US);
Tak Kwong Wong, Milpitas, CA (US);
Integrated Device Technology, Inc., San Jose, CA (US);
Abstract
An impedance matching logic generates code values that define pull-up and pull-down transistors to be enabled with output buffers. The output buffers store the code values using a two-stage latch configuration, such that updated code values are always stored within the output buffer, even if the output buffer is driving an output signal when the updated code values are received. The impedance matching logic uses previously determined code values to shorten the time required to calculate updated code values. The impedance matching logic may be operated in response to a clock signal having a frequency lower than the frequency of the output clock signal used to control the output buffers. The impedance matching logic may adjust the code values by certain percentages using a multiplication function, thereby allowing for design fine tuning (e.g., due to layout mismatch).
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile