The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2010

Filed:

Oct. 31, 2007
Applicant:

Chee Hong Choi, Seoul, KR;

Inventor:

Chee Hong Choi, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/283 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a semiconductor device having a metal wiring is provided. The method includes: forming an inter-metal dielectric (IMD) layer on the semiconductor substrate having a first metal wiring formed therein, the IMD layer including a first IMD layer and a second IMD layer; forming a via hole in the IMD layer to expose the first metal wiring; forming an ion barrier layer on sidewalls of the via hole; forming a diffusion barrier layer on the semiconductor substrate, on which the ion barrier layer has been formed; forming a metal layer on the semiconductor substrate in the via hole; and forming a second metal wiring on the semiconductor substrate, the second metal wiring contacting the metal layer in the via hole.


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