The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2010

Filed:

Jun. 11, 2007
Applicants:

Tsuyoshi Iwasa, Ichihara, JP;

Atsushi Funaki, Ichihara, JP;

Yoshiaki Higuchi, Ichihara, JP;

Inventors:

Tsuyoshi Iwasa, Ichihara, JP;

Atsushi Funaki, Ichihara, JP;

Yoshiaki Higuchi, Ichihara, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B 15/082 (2006.01); B32B 15/20 (2006.01); B32B 27/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

A laminate for a printed wiring board having a laminate structure comprising an electrical insulator layer (A) and an electrical conductor layer (B) bonded directly to each other, wherein the electrical insulator layer (A) is formed of a fluorocopolymer comprising repeating units (a) based on tetrafluoroethylene and/or chlorotrifluoroethylene, repeating units (b) based on a fluoromonomer excluding tetrafluoroethylene and chlorotrifluoroethylene, and repeating units (c) based on a monomer having an acid anhydride residue and a polymerizable unsaturated bond in amounts of (a) being from 50 to 99.89 mol %, (b) being from 0.1 to 49.99 mol % and (c) being from 0.01 to 5 mol %, based on ((a)+(b)+(c)), and the electrical conductor layer (B) has a surface roughness of at most 10 μm on the side being in contact with the electrical insulator layer (A). The laminate for a printed wiring board is excellent in signal response in a high frequency region.


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