The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2010

Filed:

Sep. 25, 2007
Applicants:

Ju-tien Cheng, Tainan County, TW;

Yih-long Tseng, Tainan County, TW;

Hon-yuan Leo, Tainan County, TW;

Cheng-chi Yen, Tainan County, TW;

Inventors:

Ju-Tien Cheng, Tainan County, TW;

Yih-Long Tseng, Tainan County, TW;

Hon-Yuan Leo, Tainan County, TW;

Cheng-Chi Yen, Tainan County, TW;

Assignee:

Himax Display, Inc., Tainan County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
Abstract

A connection testing apparatus, a connection testing method, and a chip using the same are provided. The method can be used for testing connections between chips, so as to solve the problems that a conventional multi-chip connection test needs a plenty of test patterns, resulting in a long test time and a high test cost, and the condition of a connection failure is hard to be analyzed after a test failure. In the present invention, a voltage variation caused when an ESD element in a chip is conducted and a comparison circuits are used to determine whether a connection is correct. Furthermore, the test apparatus is built in the chip, so that the connection test may be accomplished quickly and efficiently. Once a connection failure occurs, the failed connection pin can also be found, so as to be favorable for engineering analysis and thereby effectively saving the test cost.


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