The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 2010
Filed:
Dec. 09, 2005
Suman K. Banerjee, Chandler, AZ (US);
Alain C. Duvallet, Austin, TX (US);
Craig Jasper, Queen Creek, AZ (US);
Olin L. Hartin, Chandler, AZ (US);
Walter Parmon, Chandler, AZ (US);
Suman K. Banerjee, Chandler, AZ (US);
Alain C. Duvallet, Austin, TX (US);
Craig Jasper, Queen Creek, AZ (US);
Olin L. Hartin, Chandler, AZ (US);
Walter Parmon, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
Method and apparatus are provided for routing interconnects of a dual-gate electronic device operating in a differential configuration. An electronic apparatus formed on a substrate is provided comprising a first interconnect () configured to couple to a first region of the substrate, a first gate () coupled to the first interconnect and configured to receive a first differential input, a second interconnect () parallel to the first interconnect and configured to couple to a second region of the substrate, and a second gate () coupled to the second interconnect and configured to receive a second differential input. The first gate is parallel to the first interconnect, and the second gate is parallel to the second interconnect.