The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2010

Filed:

Jul. 28, 2006
Applicants:

Kiyoshi Shibata, Ogaki, JP;

Ryosuke Usui, Ichinomiya, JP;

Yasunori Inoue, Ogaki, JP;

Inventors:

Kiyoshi Shibata, Ogaki, JP;

Ryosuke Usui, Ichinomiya, JP;

Yasunori Inoue, Ogaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 12/04 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit board and a circuit apparatus using the same which can prevent displacement and film exfoliation ascribable to thermal expansion, and suppress a drop in reliability at increasing temperatures. The circuit board of the circuit apparatus includes a metal substrate having pierced holes as a core member. Protrusions are formed on the top ends of the pierced holes, and depressions are formed in the bottom ends of the pierced holes. Wiring pattern layers are formed on both sides of this metal substrate via respective insulating layers. In order to establish electrical connection between the wiring pattern layers, a conductor layer which connects the wiring pattern layers is formed through the metal substrate via the pierced holes. The conductor layer thereby establishes electrical conduction between the wiring pattern layers. Furthermore, a semiconductor chip is directly connected to the surface side of the circuit board via solder balls.


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