The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 16, 2010
Filed:
Feb. 24, 2004
Roy Stephen Colby, Raleigh, NC (US);
Mark John Kocher, Raleigh, NC (US);
Gerald Benjamin Carson, Raleigh, NC (US);
Roy Stephen Colby, Raleigh, NC (US);
Mark John Kocher, Raleigh, NC (US);
Gerald Benjamin Carson, Raleigh, NC (US);
Schneider Electric USA, Inc., Palatine, IL (US);
Abstract
A phase locked loop (PLL) circuit provides ac devices, such as power inverters and power measurement devices, with a reliable means for synchronizing to ac electrical systems. In an exemplary embodiment, the PLL circuit is configured for operation with single-phase electrical systems and offers substantial noise immunity by basing its locking operations on measured fundamental components, i.e., measured x-y phasors, of the electrical system voltage. Further, with its phasor-based locking operations and with its timer/counter-based operation, the PLL circuit can be implemented partly or wholly in digital processing logic.