The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 16, 2010
Filed:
Apr. 15, 2005
Applicants:
Yanjun MA, Bellevue, WA (US);
William T. Colleran, Seattle, WA (US);
Vadim Gutnik, Irvine, CA (US);
Inventors:
Assignee:
Virage Logic Corporation, Fremont, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/06 (2006.01);
U.S. Cl.
CPC ...
Abstract
Two floating gate devices are arranged in a redundant configuration in a non-volatile memory (NVM) such that stress induced leakage current (SILC) or other failures do not result in a complete loss of memory storage. The redundant NVM may be arranged as a series configuration, a parallel configuration, a single-ended device, a differential device, a simple logic circuit function, a complex logic circuit function, and/or as part of an RFID tag system.