The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 16, 2010
Filed:
Oct. 18, 2007
Chi-kung Kuan, Tao-Yuan Hsien, TW;
Yu-pin Chou, Miao-Li Hsien, TW;
Yi-teng Chen, Kao-Hsiung, TW;
Realtek Semiconductor Corp., Hsinchu, TW;
Abstract
A phase-locked loop (PLL) including a digital PFD, a digital loop filter, a decision circuit, a fractional-N PLL, and a frequency divider is provided. The digital PFD generates a first detection signal according to the phase error or frequency difference between an input signal and a feedback signal. The digital loop filter generates a first control signal according to the first detection signal. The decision circuit generates a divisor value according to the first control signal. The fractional-N PLL generates an oscillation signal according to the divisor value and a reference signal. The frequency divider divides the oscillation signal to produce the feedback signal. The fractional-N PLL includes a fractional-N frequency divider for generating a frequency-divided signal for use in tracking the reference signal according to the divisor value by employing phase swallow means.