The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2010

Filed:

Feb. 29, 2008
Applicants:

Young Jin Kim, Goyang-si, KR;

Myung Woon Hwang, Seoul, KR;

Inventors:

Young Jin Kim, Goyang-si, KR;

Myung Woon Hwang, Seoul, KR;

Assignee:

FCI Inc., Seongnam-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03G 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A variable-gain low-noise amplifier is provided. The variable-gain low-noise amplifier includes a first load, a second load, an input transistor, a pole/zero control circuit, and a gain control circuit. A first terminal of the first load is connected to a power-source voltage, and a second terminal thereof is connected to an output terminal. The second load is operated in response to a bias voltage, and a first terminal thereof is connected to the output terminal. A first terminal of the input transistor is connected to the second terminal of the second load, and a gate thereof is connected to an input terminal. The pole/zero control circuit adjusts frequency characteristics and a gain in response to at least one pole/zero control signal. A first terminal of the pole/zero control circuit is connected to the input terminal, and a second terminal thereof is connected to the output terminal. The gain control circuit adjusts the gain in response to at least one gain control signal. A first terminal of the gain control circuit is connected to a common terminal of the second load and the input transistor, and a second terminal thereof is connected to the input terminal, and a third terminal thereof of is connected to a ground voltage.


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