The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2010

Filed:

Apr. 27, 2006
Applicant:

Yasushi Kasa, Kawasaki, JP;

Inventor:

Yasushi Kasa, Kawasaki, JP;

Assignee:

Spansion LLC, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/72 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device is provided which includes a pair of metal interconnections (B, C) provided above a semiconductor substrate (), a program layer () provided over the pair of metal interconnections (B, C) and in which an opening () may be selectively formed in the program layer () on the basis of programming information, and a read circuit () reading the programming information by determining whether such an opening () is formed in the program layer () by utilizing an electrostatic capacitance between the pair of metal interconnections (B, C). The program layer () may be made of a material having a dielectric constant higher than that of air or the program layer () may be made of a conductor or a material having a dielectric constant lower than that of air. Thus, trimming information or information on a device identification (ID) can be stored, even if the semiconductor device is a logic device that does not have a memory transistor, by detecting the information that is determined by the electrostatic capacitance that varies depending on whether or not there is provided an opening ().


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