The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 16, 2010
Filed:
Oct. 16, 2006
Sandor T. Farkas, Round Rock, TX (US);
Hector F. Martinez, Austin, TX (US);
Bhavesh Patel, Austin, TX (US);
Indrani Paul, Round Rock, TX (US);
Larry P. Robison, Jr., Pflugerville, TX (US);
Darrell J. Slupek, Austin, TX (US);
Aubrey Sparkman, Austin, TX (US);
Sandor T. Farkas, Round Rock, TX (US);
Hector F. Martinez, Austin, TX (US);
Bhavesh Patel, Austin, TX (US);
Indrani Paul, Round Rock, TX (US);
Larry P. Robison, Jr., Pflugerville, TX (US);
Darrell J. Slupek, Austin, TX (US);
Aubrey Sparkman, Austin, TX (US);
Dell Products L.P., Round Rock, TX (US);
Abstract
A test coupon on a printed circuit board used for verifying that vias in the printed circuit board are back drilled to a proper predetermined depth. Use of the coupon involves correlating a via on the board to a via of a test coupon drilling the board via and the test coupon via to substantially the same depth, where the depth is predetermined based on the board via. Then measuring the impedance of the test coupon to reveal the actual depth of the back drilling of the coupon via. Knowing the actual back drill depth of the coupon via is used to verify the back drill depth of the board via.