The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 2010
Filed:
May. 29, 2007
Howard Chen, Yorktown Heights, NY (US);
Katherine V. Hawkins, Hyde Park, NY (US);
Fook-luen Heng, Yorktown Heights, NY (US);
Louis Hsu, Fishkill, NY (US);
Xu Ouyang, Hopewell Junction, NY (US);
Howard Chen, Yorktown Heights, NY (US);
Katherine V. Hawkins, Hyde Park, NY (US);
Fook-Luen Heng, Yorktown Heights, NY (US);
Louis Hsu, Fishkill, NY (US);
Xu Ouyang, Hopewell Junction, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for determining the root causes of fail patterns in integrated circuit chips is provide wherein a known integrated circuit chip layout is used to identify a plurality of potential defects and a plurality of potential fail patterns in the integrated circuit chip. Correlations between the potential defects and the potential fail patterns that result from those defects are identified. Based on this identification, the potential fail patterns are grouped by common potential defect. An actual integrated circuit chip that is manufactured in accordance with the test layout is tested for failure patterns. These failure patterns are then compared to the groupings of potential fail patterns. When a match is found, that is when a given group of fail patterns is found in the actual integrated circuit chip, then the potential defect associated with the potential fail patterns to which the actual fail patterns are matched is identified. This defect is the root cause of the failure pattern in the actual chip.