The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2010

Filed:

Aug. 23, 2006
Applicants:

Daniel R. Cassiday, Topsfield, MA (US);

Andrew W. Wilson, Fremont, CA (US);

John Acton, Danville, CA (US);

Charles Binford, Wichita, KS (US);

Raymond J. Lanza, Nashua, NH (US);

Inventors:

Daniel R. Cassiday, Topsfield, MA (US);

Andrew W. Wilson, Fremont, CA (US);

John Acton, Danville, CA (US);

Charles Binford, Wichita, KS (US);

Raymond J. Lanza, Nashua, NH (US);

Assignee:

Sun Microsystems, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A plurality of PCIe switch complexes are interposed between a plurality of I/O devices and a plurality of microprocessor complexes. Each PCIe switching complex comprises a plurality of PCIe switches wherein each switch possesses at least one non-transparent port. The non-transparent port is used to cross-couple each PCIe switch creating an active matrix of paths between the HBAs associated with each I/O device and each microprocessor. The paths between each HBA (I/O device) and each microprocessor are mapped using a recursive algorithm providing each I/O device with direct memory access to each microprocessor.


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