The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2010

Filed:

Aug. 08, 2006
Applicants:

Young-soo Park, Gyeonggi-do, KR;

Kyoo-chul Cho, Gyeonggi-do, KR;

Shin-hyeok Han, Seoul, KR;

Tae-soo Kang, Gyeonggi-do, KR;

Inventors:

Young-Soo Park, Gyeonggi-do, KR;

Kyoo-Chul Cho, Gyeonggi-do, KR;

Shin-Hyeok Han, Seoul, KR;

Tae-Soo Kang, Gyeonggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/80 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed is a semiconductor wafer and method of fabricating the same. The semiconductor wafer is comprised of a semiconductor layer formed on an insulation layer on a base substrate. The semiconductor layer includes a surface region organized in a first crystallographic orientation, and another surface region organized in a second crystallographic orientation. The performance of a semiconductor device with unit elements that use charges, which are activated in high mobility to the crystallographic orientation, as carriers is enhanced. The semiconductor wafer is completed by forming the semiconductor layer with the second crystallographic orientation on the plane of the first crystallographic orientation, growing an epitaxial layer, forming the insulation layer on the epitaxial layer, and then bonding the insulation layer to the base substrate.


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