The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 2010
Filed:
Jun. 09, 2006
Katsumi Kikuchi, Tokyo, JP;
Shintaro Yamamichi, Tokyo, JP;
Hideya Murai, Tokyo, JP;
Takuo Funaya, Tokyo, JP;
Takehiko Maeda, Kanagawa, JP;
Hirokazu Honda, Kanagawa, JP;
Kenta Ogawa, Kanagawa, JP;
Jun Tsukano, Kanagawa, JP;
Katsumi Kikuchi, Tokyo, JP;
Shintaro Yamamichi, Tokyo, JP;
Hideya Murai, Tokyo, JP;
Takuo Funaya, Tokyo, JP;
Takehiko Maeda, Kanagawa, JP;
Hirokazu Honda, Kanagawa, JP;
Kenta Ogawa, Kanagawa, JP;
Jun Tsukano, Kanagawa, JP;
NEC Electronics Corporation, Kanagawa, JP;
NEC Corporation, Tokyo, JP;
Abstract
A wiring board for mounting a semiconductor element or electronic component having a plurality of wiring layers, an insulating layer provided between these wiring layers, and a via which is provided to the insulating layer and which electrically connects the wiring layers. In this wiring board, the cross-sectional shape of the via in the plane parallel to the wiring layers is obtained by the partial overlapping of a plurality of similar shapes (circles). Stable operation can be obtained in a semiconductor element by minimizing obstacles to increased density, effectively increasing the cross-sectional area of the via, and preventing the wiring resistance from increasing by making the cross-sectional shape of the via into a shape obtained by the partial overlapping of a plurality of similar shapes.