The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 2010
Filed:
Nov. 14, 2006
Tobias J. Becker, Bergisch Gladbach, DE;
Brandon J. Blodget, Santa Clara, CA (US);
Tobias J. Becker, Bergisch Gladbach, DE;
Brandon J. Blodget, Santa Clara, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Enhancing relocatability of partial configuration bitstreams from a first area to a second area of programmable logic of an integrated circuit is described. A first set and a second set of logic resources of the programmable logic are identified. The first set and the second set of logic resources are respectively associated with the first area and the second area, the second area being wholly or partially offset from the first area. Differences between the first set of logic resources and the second set of logic resources are identified. The differences are associated with one or more of different types of circuit resources in each of the first area and the second area. Prohibit constraints associated with the differences are set.