The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7672181 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 02, 2010

Filed:

May. 30, 2008
Applicants:

Kaoru Mori, Kawasaki, JP;

Kota Hara, Kawasaki, JP;

Jun Ohno, Kawasaki, JP;

Inventors:

Kaoru Mori, Kawasaki, JP;

Kota Hara, Kawasaki, JP;

Jun Ohno, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Each sub word line is coupled to a gate of a transfer transistor of a memory cell. A first switch of a sub word decoder couples the sub word line to a high level voltage line when a main word line is in an activation level. A second switch couples the sub word line to a low level voltage line when the main word line is in an inactivation level. A third switch couples the sub word line to the low level voltage line when a word reset signal line is in an activation level. A reset control circuit disables the inactivation of the main word line or the activation of the word reset signal line during a test mode. One of the second and third switches is forcibly turned off, and thereby, an operation failure of a sub word decoder can be detected easily.


Find Patent Forward Citations

Mori, Kaoru. (2010). Semiconductor memory, test method of semiconductor memory and system (U.S. Patent No. 7672181). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7672181

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