The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2010

Filed:

Sep. 28, 2007
Applicants:

David Money Harris, Upland, CA (US);

Scott M. Fairbanks, Mountain View, CA (US);

Inventors:

David Money Harris, Upland, CA (US);

Scott M. Fairbanks, Mountain View, CA (US);

Assignee:

Sun Microsystems, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An implicitly pulsed dual edge triggered pulsed latch. The implicitly pulsed latch includes an overlapping clock generator and a transparency circuit designed to cause a transparent latch circuit to become transparent on each edge of a clock signal. A logic value on the input node of the latch is transferred to the output node of the latch in response to each clock edge transition. An explicitly pulsed dual edge triggered pulsed latch including a pulse generator and a transparent latch circuit. The explicitly pulsed latch includes a symmetrical pulse generator designed to cause the latch circuit to pass a logic value from the input node of the latch to the output node of the latch in response to a pulse on the clock node.


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