The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 2010
Filed:
Oct. 04, 2005
Applicant:
Yasushi Amamiya, Tokyo, JP;
Inventor:
Yasushi Amamiya, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A logic circuit is provided with a first differential transistor pair (Q, Q) operable in response to a data signal input thereto; a current source for supplying a current to the first differential transistor pair (Q, Q); a first transistor (Q) connected between a common emitter of the first differential transistor pair (Q, Q) and the current source, and operable in response to a clock signal input thereto; and a first potential stabilizing circuit () connected to a first junction between the common emitter of the first differential transistor pair (Q, Q) and a collector of the first transistor (Q), for stabilizing a potential at said first junction.