The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2010
Filed:
Dec. 09, 2008
Leo Min Maung, Fremont, CA (US);
Leo Min Maung, Fremont, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Circuits, methods, and apparatus for low-skew input/output level-shift circuits. One low-skew input/output circuit includes a single-ended-to-differential converter, a level-shift circuit, and a differential-to-single-ended converter. The circuit employs a low-skew single-ended-to-differential converter that provides an output to a level-shift circuit. To reduce skew, the single-ended-to-differential converter includes multiple paths from the input to its inverting and non-inverting outputs. The level-shift circuit translates signal levels between voltages used by the core and voltages used by the input and output circuits of the integrated circuit. An output from the level-shifter is received by the differential-to-single-ended converter. This converter also includes multiple signal paths coupling inverting and non-inverting signal paths. A threshold of an input inverter in the differential-to-single-ended converter is set by appropriately adjusting ratio of the size of its p-channel pull-up and n-channel pull-down transistors to match the rising and falling edges of the signals provided by the level-shift circuit.