The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2010
Filed:
Sep. 09, 2003
Satoko Kawakami, Kanagawa, JP;
Yoichiro Kurita, Kanagawa, JP;
Takehiro Kimura, Kanagawa, JP;
Ryuya Kuroda, Kanagawa, JP;
Satoko Kawakami, Kanagawa, JP;
Yoichiro Kurita, Kanagawa, JP;
Takehiro Kimura, Kanagawa, JP;
Ryuya Kuroda, Kanagawa, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
In a multi-chip package having vertically stacked semiconductor integrated circuits (chips), a heat transmitting conductive plate () can be interposed between a lower layer semiconductor chip () and an upper layer semiconductor chip () and connected to a ground wiring of a substrate () through a bonding wire (). A heating transmitting conductive plate () at the ground potential can block propagation of noise between the lower layer semiconductor chip () and upper layer semiconductor chip (). Thus, the addition of noise to signals of an analog circuit in the upper layer semiconductor chip () can be avoided, reducing noise induced malfunctions. Furthermore, heat generated by the lower layer semiconductor chip () and upper layer semiconductor chip () can be transmitted through contact points with the heat transmitting conductive plate () for dissipation therefrom. This can improve heat dissipating capabilities of the semiconductor device () contributing to more stable operation.