Sige semiconductor device and method of manufacturing the same

Abstract

Provided are a SiGe semiconductor device and a method of manufacturing the same. The method includes the steps of: forming a buried collector by doping impurity ions into a buried collector region formed on a substrate; forming a collector layer which is an active region and a collector electrode region by forming a Si epitaxial layer on the substrate having the buried collector; forming an isolation layer on the substrate and exposing the collector layer and the collector electrode region; forming a collector pad oxide layer on the collector electrode region; stacking a base epitaxial layer and a pad oxide layer on the substrate having the collector pad oxide layer and patterning the pad oxide layer; forming a first polycrystalline Si (poly-Si) layer on the patterned pad oxide layer; exposing at least a portion of the patterned pad oxide layer by etching the first poly-Si layer; depositing a metal layer on the first poly-Si layer to form a first silicide layer; forming an oxide layer on the substrate having the first silicide layer, and exposing a base-emitter junction and the collector electrode region; forming an emitter electrode and a collector electrode by depositing a second poly-Si layer on the exposed base-emitter junction and collector electrode region; and depositing a metal layer on the emitter and collector electrodes to form a second silicide layer, and forming a base terminal, an emitter terminal, and a collector terminal. In this method, base parasitic resistance can be reduced, an electrical short due to agglomeration caused by Ge can be prevented during the formation of the silicide layer, and the base-emitter junction can be protected using the pad oxide layer from external processes, thereby enhancing process stability and reliability.