The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 16, 2010
Filed:
Jul. 17, 2006
Ali Burney, Fremont, CA (US);
Sanjay K. Charagulla, San Jose, CA (US);
Ali Burney, Fremont, CA (US);
Sanjay K. Charagulla, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Integrated circuits such as programmable logic device integrated circuits with memory interface circuitry are provided. The memory interface circuitry measures the timing characteristics of an associated memory during a series of dummy read operations. A multiplexer and phase detector are used to measure phase shifts of memory group clock signals compared to a system clock signal. The memory interface circuitry uses these measurements to adjust a delay-locked-loop circuit. The delay-locked-loop circuit produces a capture clock that is used to read data from the memory.