Circuit and method for reducing charge injection and clock feed-through in switched capacitor circuits

Abstract

A low charge injection, low clock feed-through switch () has an input signal (Vin) applied both to the sources of first (S) and second () switching transistors. A first clock signal (P) having pulses of a first duration ts is applied to a gate of the first switching transistor, and a second clock signal (P) having pulses of a second duration m×ts substantially less than the first duration is applied to a gate of the second switching transistor. A capacitor (C) is charged toward the input voltage through both the first and second switching transistors during the pulse of the second clock signal. The capacitor is charged further toward the input voltage during a remaining portion of the pulse of the first clock signal.