The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7662683 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 16, 2010

Filed:

Aug. 03, 2004
Applicants:

Jung Wook Lim, Daejeon-Shi, KR;

Sun Jin Yun, Daejeon-Shi, KR;

Jin Ho Lee, Daejeon-Shi, KR;

Inventors:

Jung Wook Lim, Daejeon-Shi, KR;

Sun Jin Yun, Daejeon-Shi, KR;

Jin Ho Lee, Daejeon-Shi, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 21/3205 (2006.01); H01L 21/31 (2006.01); H01L 21/469 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a method for forming a gate dielectric layer, in which a plasma oxide layer is finely formed by plasma at a temperature of 200° C. or below, and an atomic layer deposition (ALD) oxide layer is deposited. Further, the gate dielectric layer according to the present invention can be applied to a display device comprising a substrate such as a plastic substrate vulnerable to heat, have good interfacial characteristic, and allow a high dielectric layer to be applied thereto.


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Lim, Jung. (2010). Method for forming gate dielectric layer (U.S. Patent No. 7662683). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7662683

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