The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2010

Filed:

Oct. 12, 2007
Applicants:

Stanley Hong, San Jose, CA (US);

Jami Wang, Campbell, CA (US);

Alan Chen, Saratoga, CA (US);

Inventors:

Stanley Hong, San Jose, CA (US);

Jami Wang, Campbell, CA (US);

Alan Chen, Saratoga, CA (US);

Assignee:

Atmel Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a solution for long master bit lines in a large capacity memory device. A master bit line is partitioned by at least one switching transistor placed on the master bit line.


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Hong, Stanley. (2010). Memory architecture with advanced main-bitline partitioning circuitry for enhanced erase/program/verify operations (U.S. Patent No. 7656708). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7656708

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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